The present invention relates to an input/output buffer, and more particularly to an input/output buffer for prefetching data in a direct memory access transfer.
In direct memory access (DMA) transfer, data are transferred between a storage and input/output (I/O) device without intervention by a processor. In the DMA transfer, data from the storage are temporarily buffered in an I/O buffer in order to improve data transfer performance.
The conventional I/O buffer has a tag memory for storing address tags and a data memory for storing corresponding data, similarly to the structure of a cache memory. A cache memory utilizes the principle of locality. This principle has two dimensions, i.e., time and space. Temporal locality assumes that if an item is referenced, it will tend to be referenced again soon. Spatial locality assumes that if an item is referenced, nearby items also will tend to be referenced soon.
In the DMA transfer, however, since data are sequentially transferred, an access may not be repeatedly made to the same data. In other words, when data which have been read from a storage and written in an I/O buffer are read once by a DMA controller, the data may not be accessed again. Therefore, if the same protocol with that of a cache memory is adopted in an I/O buffer, the I/O buffer may be filled with unnecessary blocks. Further, if the data with respect to the different DMA transfers exist in the same I/O buffer, the I/O buffer not only cannot be effectively used, but also coherency of the data cannot be assured.